Explanation
VLSI CAD Part II: Layout, A modern VLSI chip is a complex beast: billions of transistors, millions of logic gates deployed for computation and control, large memory blocks, stacks of pre-programmed functions designed by parties. third party (called “intellectual property” or IP blocks). How do people manage to design these complex pieces? Answer: A computer-aided design (CAD) tool takes an abstract description of a chip, and refines it step-wise to a final design.
This class focuses on the main design tools used to create an Integrated Circuit (ASIC) or System on a Chip (SoC) design. Our focus in this part of the course is on the key logical and geometric examples that make it possible to map from logic to form, and in particular, the placement, routing, and timing evaluation of logical networks. Our goal is for students to understand how the tools themselves work, their basic algorithms and data structures. Topics covered will include: technology mapping, timing analysis, and ASIC placement and configuration.
What will you learn?
- Time Analysis
- ASIC Routing
VLSI CAD Specifications Part II: Model
- Publisher: Course
- Teacher: Rob A. Rutenbar
- Language : English
- Level: Medium
- Number of courses: 6
- Duration : 24 hours and 0 minutes
Contents of VLSI CAD Part II: Model
Requirements
- Programming experience (C, C++, Java, Python, etc.) and basic knowledge of data structures and algorithms (especially recursive algorithms). Understanding of basic digital design: Boolean algebra, Kmaps, gates and flip-flops, finite state machine design. linear algebra and calculus at the junior or senior level in engineering. Basic knowledge of linear RC circuits (introductory physics class level).
Pictures
Sample Clip
Installation Guide
Extract files and watch your favorite player
Subtitle : English
Quality: 720p
Download Links
Password file: free download software
file size
1.15 GB